extraction of Band Offsets in Strained Si/Strained Si1-YGey on Relaxed Si1-XGex Dual-Channel enhanced Mobility Structures

In this work, for the first time, the valence band offset, ∆EV, between strained Si and strained Si1-yGey on relaxed Si1-xGex, has been measured using a combination of experimentation and modeling. Such structures have been shown to offer large mobility enhancements for both electrons and holes, and knowledge of the band parameters is critical in order to optimize and predict device behavior [1-3]. The positions of the conduction band edge in the strained Si and the valence band edge in the strained Si1-yGey significantly affect the effective bandgap of the structure and can be used to tune the threshold voltage of both nand p-MOSFETs for use with a single workfunction metal gate [4]. Theoretical predictions of these band parameters are uncertain by ±100 meV [5]. P-type metal-oxide-semiconductor (MOS) capacitors were fabricated on epitaxial structures containing strained Si1-yGey layers (0.4 < y < 0.8) grown on relaxed Si1-xGex layers (0.2 < x < 0.4). DEV was extracted by fitting simulated results to the experimental capacitance-voltage (C-V) characteristics of the MOS capacitors (Figures 1 and 2). The impact of the valence band edge density of states, NV, on the extraction of ∆EV is investigated. The effect of these band parameters on threshold voltage and subthreshold slope of a dual channel p-MOSFET is demonstrated using simulations.